Process Technology Guide: Lithography
A structured guide to optical and EUV lithography with process-window examples.
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Design & Simulation Files: Ring Oscillator Lab
SPICE netlists, testbenches and characterisation scripts for a 15-stage RO lab.
Fee pending View resourceTechnology Roadmap Comparison Table
A side-by-side comparison of published logic and memory roadmaps with sourcing notes.
Fee pending View resourceInterview Question Bank: Process Engineering
Questions with model answers across etch, deposition, lithography and integration.
Fee pending View resourceAdvanced Packaging Reference Deck
Reference material covering 2.5D/3D integration options, costs and supplier landscape.
Fee pending View resourceEngineering Templates: DOE and Yield Tracking
Experiment planning and yield tracking templates with instructions.
Fee pending View resourceMemory Market & Technology Report — Annual
Supply, demand and technology analysis for DRAM, NAND and HBM.
Fee pending View resourceFailure Analysis Case Study Pack
Worked failure-analysis cases with images, methodology and resolution timelines.
Fee pending View resourceUnit Conversion & Reference Calculator
Calculators for oxide thickness, sheet resistance, capacitance and DpW.
Fee pending View resourceSemiconductor Process Flow Diagrams (editable)
Editable diagrams of FEOL/MOL/BEOL flows for training and documentation.
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